UM1693 datasheet(45/196 Pages) STMICROELECTRONICS

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UM1693

Protection against battery transients

195

Figure 24. Recommended GND network for ISO 7637-2 (2011) level IV

A second solution with an additional branch in parallel (R2 + low drop diode D) depends on

specific considerations. The Table 8 gives a suggestion according to the Hybrid device type

and to the logic level of Input pin adopted.

The given suggestion, based on some experimental measures, take into account a

minimum high state input voltage on Regulator's side and the maximum voltage drop on

15 k

Ω I/O series resistance.

This yields a maximum allowed GND voltage on the device's GND network for 5 V and 3.3 V

system.

•

R1 must be chosen taking into account the two following limits:

–

Minimum value is chosen according to the signal clamp structure energy capability

and maximum power dissipation allowed inside the component (the lower is the

resistance value the higher is the Power dissipated during the pulses)

–

Maximum value is chosen to guarantee PowerMOS operation in full RON during

reverse battery and a GND shift that guarantees device properly driven ON even

in the worst case device limits (relevant parameter to be taken into account at

Table 8. GND network proposals for Hybrids HSDs

Device/VREG supply voltage

Single/double channels

VN7007AH-E

VN7004AH-E

VND7012AY-E

Quad channels VNQ7040AY-E

Assumption: max allowed GND

Shift: 1.67 V

Only R1: 150

Ω (value for each

driver)

R1 = 270

Ω // (low drop D +

series resistor R2 = 47

Ω) (value

for each driver)

Vz(D) > 150 V

3.3 V

Assumption: max allowed GND

Shift: 0.33 V

Only R1: 33

Ω (value for each

driver)

Only R1 = 18

Ω (value for each

driver)

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