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AN4218 bảng dữ liệu(PDF) 22 Page - STMicroelectronics |
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AN4218 bảng dữ liệu(HTML) 22 Page - STMicroelectronics |
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22 / 26 page ![]() Application circuits AN4218 22/26 DocID024014 Rev 2 Figure 22. Bad example circuit Calculation of RV1/2 for ADC The calculation for the voltage divider is done in the same way as for the example with RPROT. In addition to this, also the ADC-protection regarding ISO-transients has to be taken into account. Effects of the bad VMEASURE implementation Sensitivity to ISO transients Any ISO pulse voltage (e.g. +100 V, - 150 V) applied to pin VMEASURE is applied to the device pin and its ESD protection diode directly via RV1. If RV1 is not high resistive enough (see example above), the microcontroller might be damaged. Sensitivity to Electro-Magnetic-Injection (EMI) All EMI-distortions at the pin VMEASURE are coupled into the microcontroller pin via the voltage divider and may distort the microcontroller. A capacitor at the microcontroller pin improves this by adding a low resistive path to ground for high frequencies. Residual voltage at VDD in power down condition A residual voltage at VDD might happen if the current flowing from VMEASURE to VDD via the microcontroller ESD protection diode is not actively sunk to ground. Since the VDD-net supplies other components in the system (e.g. physical layer, high load drivers etc.) they will get affected as well. Absolute maximum ratings of the ESD-protection diode In power down condition the absolute maximum voltage rating (e.g. 0.3 V) as well as the absolute maximum current rating (e.g. 75 µA) may constantly be violated. The voltage and currents given above are examples only, for the actual values please refer to the associated datasheet. |
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