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AN4124 bảng dữ liệu(PDF) 17 Page - STMicroelectronics |
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AN4124 bảng dữ liệu(HTML) 17 Page - STMicroelectronics |
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17 / 32 page ![]() AN4124 FCCU settings Doc ID 023294 Rev 2 17/32 Example procedure ● After the reset the FCCU automatically enters NORMAL state. ● Configure FCCU in CONFIG with Dual-rail Encoding Protocol. – Write the key to the FCCU_CTRLK register [OP1]. – Write the FCCU_CTRL register (operation OP1). ● Emulate all (fake) SW/HW faults. – FCCU_CFG_TO=0x7 (Set Timer Out) – FCCU_CFG: (Configuration Register) – SM=1 (EOUT protocol (dual-rail, time-switching) fast switching mode) – PS=1 (fcc_eout[1] active low, fcc_eout[0] active low) – FOM=000 (Fault Output Mode selection= Dual-Rail (default state) [fccu_eout[1:0]= outputs]) – FOP=0 (Fault Output Prescaler= Input clock frequency (ipg_clk_safe clock) is divided by 2 x 1024) – FCCU_NCFS_CFG0 = 0 (No reset reaction) – FCCU_NCFE0 = 0xFFFFFFFF; (Enable FCCU to move to ALARM or FAULT State) – FCCU_NCF_TOE0 = 0xFFFFFFFF; (FCCU moves into the ALARM state if the respective fault is enabled (NCFEx is set)) – FCCU_NCF_TO = 0xFFFFFFFF; (Non-critical fault time-out) ● Enter NORMAL state. – Write the key to the FCCU_CTRLK register [OP2]. – Write the FCCU_CTRL register (operation OP2). ● Set fault by FCCU_NCFF registers (NCF N. 12). ● ISR assertion: FAULT_ISR managing (ISR N. 250) ● Read and verify FCCU_NCFS0..3 by means of procedure. ● Clear HW/SW faults from FCCU_NCFS0..3 by means of procedure. Code After the core initialization in main function the code is: if((tc1_INIT()) == PASS){ /* ----------------- Fake NCF Fault --------------------- */ FCCU.NCFF.R = 12; /* N. 12 NCF Fault injection */ Delay(10000); /* Delay */ }else{ /* tc1_INIT - FAILURE */ } Description At the beginning the micro is in DRUN mode. The FCCU is configured in the tc1_INIT. Next the NCF 12 is set. When the injection fault is asserted (FCCU.NCFF.R = 12), the system asserts FAULT ISR. In FAULT ISR the fault is cleared and the system enters RUN mode. |
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