AN3326 datasheet(13/21 Pages) STMICROELECTRONICS

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AN3326

Supply pins and decoupling

The SPC56EL60x has different supply/decoupling pins:



Core logic pins (VDD_LV_CORx and VSS_LV_CORx)



Voltage regulator pins(d) (VDD_HV_PMU and VDD_HV_REGx)



ADC0 and ADC1 pins (VDD_HV_ADV and VSS_HV_ADV)



Input/Output pins (VDD_HV_IO and VSS_HV_IO)



Crystal oscillator amplifier pins (VDD_HV_OSC and VSS_HV_OSC)



Flash pins (VDD_HV_FLA and VSS_HV_FLA)



FMPLL pins (VDD_LV_PLL0_PLL1 and VSS_LV_PLL0_PLL1)

Other pins which must by considered are:



External NPN ballast base control pin (BCRTL)



ADC0 and ADC1 high voltage reference (VDD_HV_ADR0 and VDD_HV_ADR1)



ADC0 and ADC1 low voltage reference (VDD_LV_ADR0 and VDD_LV_ADR1)

Please refer to the device reference manual and datasheet for complete details on these

pins.

4.1

Decoupling capacitors

This section provides the values of the different recommended capacitors.

Hardware designers must pay particular attention to place the decoupling capacitors beside

the respective pins.

Figure 5 shows the connection between the external ballast and SPC56EL60x.

VDD_HV_PMU pin is the voltage supply of the internal regulator; VDD_HV_REGx pins are the collector of the

internal ballasts.

AN3326 bảng dữ liệu(PDF) 13 Page - STMicroelectronics