UPD16337 datasheet(4/16 Pages) NEC

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µPD16337

PIN DESCRIPTION

Symbol

Pin Name

Pin Number

Description

Polarity change input

PC = L: All driver output invert

BLK

Blank input

BLK = H: All output = H or L

Latch enable input

Automatically executes latch by setting High at rising edge

of the clock

A1 to A4

RIGHT data input/output

43 to 46

When R/L = H,

A1 to A4: Input B1 to B4: Output

B1 to B4

LEFT data input/output

38 to 35

When R/L = L,

A1 to A4: Output B1 to B4: Input

CLK

Clock input

Shift executed on fall

R/L

Shift control input

Right shift mode when R/L = H

SR1: A1

→ S1 ··· S61 → B1 (Same direction for SR2·SR4)

Left shift mode when R/L = L

SR1: B1

→ S61 ··· S1 → A1 (Same direction for SR2·SR4)

O1 to O64

High withstand voltage output

54 to 75, 81 to

130 V, 40 mA MAX.

100, 6 to 27

VDD1

Power supply for logic block

5 V

±10%

VDD2

Power supply for driver block

2, 29, 52, 79

30 to 130 V

VSS1

Logic GND

Connect to system GND

VSS2

Driver GND

4, 31, 50, 77

Connect to system GND

Non-connection

1, 3, 5, 28, 30,

Non-connection

32, 40, 49, 51,

Ensure that pin 40 is left open.

53, 76, 78, 80

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