DAC8412BTCSLASH883C datasheet(17/20 Pages) AD

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Data Sheet

DAC8412/DAC8413

Rev. G | Page 17 of 20

The 0.2 μF bypass capacitors shown at the reference inputs in

Figure 40 should be used whenever ±10 V references are used.

Applications with single references or references to ±5 V may

not require the 0.2 μF bypassing. The 6.2 Ω resistor in series

with the output of the reference amplifier keeps the amplifier

from oscillating with the capacitive load. This 6.2 Ω resistor has

been found to be large enough to stabilize this circuit. Larger

resistor values are acceptable, provided that the drop across the

resistor does not exceed VBE. Assuming a minimum VBE of 0.6 V

and a maximum current of 2.75 mA, then the resistor should be

under 200 Ω for the loading of a single DAC8412.

Using two separate references is not recommended. Having two

references can cause different drifts with time and temperature;

whereas with a single reference, most drifts track.

Unipolar positive full-scale operation can usually be set with a

reference with the correct output voltage. This is preferable to

using a reference and dividing down to the required value. For a

10 V full-scale output, the circuit can be configured as shown in

Figure 41. In this configuration, the full-scale value is set first by

adjusting the 10 kΩ resistor for a full-scale output of 9.9976 V.

10kΩ

0.01µF

10µF

–15V

GND

TRIM

OUTPUT

VOLTAGE

REFERENCE

0.2µF

VREFL

VREFH

DAC8412

DAC8413

0.1µF

//10µF

ZERO TO –10V OPERATION

VDD

VSS

Figure 41. Unipolar –10 V Operation

Figure 41 shows the DAC8412 configured for –10 V to 0 V

operation. A –10 V full-scale output voltage reference is

connected directly to VREFL for the reference voltage.

SINGLE +5 V SUPPLY OPERATION

For operation with a 5 V supply, the reference voltage should be

set between 1.0 V and 2.5 V for optimum linearity. Figure 42

shows a REF43 used to supply a 2.5 V reference voltage. The

headroom of the reference and DAC are both sufficient to support

a 5 V supply with ±5% tolerance. VDD and VLOGIC should be

connected to the same supply. Separate bypassing to each pin

should also be used.

INPUT

OUTPUT

GND

TRIM

REF43

ZERO TO 2.5V OPERATION

SINGLE 5V SUPPLY

10kΩ

0.2µF

VREFL

VREFH

DAC8412

DAC8413

0.1µF

//10µF

10µF

0.01µF

VDD

VSS

Figure 42. +5 V Single-Supply Operation

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