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ISL6590DR bảng dữ liệu(PDF) 16 Page - Intersil Corporation |
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ISL6590DR bảng dữ liệu(HTML) 16 Page - Intersil Corporation |
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16 / 24 page ![]() 16 Adjusting The Digital PID Frequency response of the digital PID compensator is determined by the Kp, Ki, Kd factors. These factors are stored in nonvolatile memory and are loaded in the controller at power on reset. The system designer sets the PID compensators frequency response using user interface software. The designer enters the frequencies of the desired poles and zeros and user interface software calculates the Kp, Ki and Kd factors. the software will calculate and display the frequency response of the feedback and the closed loop system. FZ1 = Frequency of first zero FZ2 = Frequency of second zero FP0 = Gain * frequency of first pole (A DC*F P0) FP1 = Frequency of second pole RP2 = External Resistor used for third pole CP2 = External Capacitor used for third pole FP2 = 1 / (2 * π* RP2 * CP2 ) The software will calculate the frequency response of the PID controller and the closed loop system as in figures 20 and 21 below. FIGURE 16. DIGITAL PID COMPENSATOR FIGURE 17. DESIGN PARAMETER INPUT WINDOW FIGURE 18. SMALL SIGNAL DESIGN WINDOW FIGURE 19. BODE PLOT ISL6590 Primarion is a registered trademark of Primarion, Inc. Primarion PowerCode is a trademark of Primarion, Inc |
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