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AP2071 bảng dữ liệu(PDF) 21 Page - Asahi Kasei Microsystems

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[AP2071AEN]
MS1607-E-00
- 21 -
2014/03
2. READ Operations
Set the R/W bit = “1” for the READ operation of the AP2071AEN. The master can read the next address’s data
by generating an acknowledge instead of terminating the write cycle after the receipt of the first data word.
After receiving each data packet the internal 5-bit address counter is incremented, and the next data is
automatically taken into the next address. If the address exceeds 08H prior to generating stop condition, the
address counter will “roll over” to 00H and the previous data will be overwritten.
The AP2071AEN supports one basic read operation: Random Address Read.
2-1. Random Address Read
The random read operation allows the master to access any memory location at random. Prior to issuing the
slave address with the R/W bit “1”, the master must first perform a “dummy” write operation. The master
issues start request, a slave address (R/W bit = “0”) and then the register address to read. After the register
address is acknowledged, the master immediately reissues the start request and the slave address with the R/W
bit “1”. The AP2071AEN then generates an acknowledge, 1 byte of data and increments the internal address
counter by 1. If the master does not generate an acknowledge to the data but generates a stop condition, the
AP2071AEN ceases transmission.
SDA
Slave
Address
S
S
T
A
R
T
R/W="0"
A
C
K
A
C
K
A
C
K
Data(n)
A
C
K
Data(n+x)
A
C
K
P
S
T
O
P
Sub
Address(n)
S
Slave
Address
R/W="1"
S
T
A
R
T
Data(n+1)
A
C
K
N
A
C
K
M
A
S
T
E
R
M
A
S
T
E
R
M
A
S
T
E
R
M
A
S
T
E
R
Figure 13. Random Address Read



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