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HPLR3103 bảng dữ liệu(PDF) 3 Page - Intersil Corporation |
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HPLR3103 bảng dữ liệu(HTML) 3 Page - Intersil Corporation |
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3 / 6 page ![]() 6-5 Thermal Resistance Junction to Case RθJC - - 1.4 oC/W Thermal Resistance Junction to Ambient RθJA - - 110 oC/W (PCB Mount Steady State) - - 50 oC/W Electrical Specifications TC = 25 oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Continuous Source to Drain Current ISD MOSFET Symbol Showing The Integral Reverse P-N Junction Diode - - 52 (Note 1) A Pulsed Source to Drain Current (Note 2) ISDM - - 220 A Source to Drain Diode Voltage (Note 3) VSD ISD = 28A - - 1.3 V Reverse Recovery Time (Note 3) trr ISD = 34A, dISD/dt = 100A/µs - 81 120 ns Reverse Recovered Charge (Note 3) QRR ISD = 34A, dISD/dt = 100A/µs - 210 310 nC NOTES: 2. Repetitive rating; pulse width limited by maximum junction temperature (See Figure 11). 3. Pulse width ≤ 300µs; duty cycle ≤ 2%. 4. VDD = 15V, starting TJ = 25 oC, L = 300µH, RG = 25Ω, peak IAS = 34A, (Figure 10). Typical Performance Curves FIGURE 1. OUTPUT CHARACTERISTICS FIGURE 2. OUTPUT CHARACTERISTICS D G S 1 100 1000 0.1 1.0 10 100 20 µs PULSE WIDTH TC = 25 oC VGS IN DECENDING ORDER VDS, DRAIN TO SOURCE VOLTAGE (V) 12V 10V 8.0V 6.0V 4.0V 3.0V 2.5V 15V 10 1 100 1000 0.1 1 10 100 20 µs PULSE WIDTH TC = 150 oC VDS, DRAIN TO SOURCE VOLTAGE (V) 12V 10V 8.0V 6.0V 4.0V 3.0V 2.5V 15V VGS IN DECENDING ORDER 10 HPLR3103, HPLU3103 |
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