6-70

Functional Diagram

NOTES:

1. All lines positive logic - active high.

2. Three-state buffers: A high

→ output active.

3. Address latches and gated decoders: Latch on falling edge of E and gate on falling edge of E.

5

A

LATCHED ADDRESS

REGISTER

LATCHED

ADDRESS

REGISTER

GATED

ROW

DECODER

32

GATED COLUMN

DECODER

AND DATA I/O

E

W

Q

A5

A4

A3

A2

A1

A0

32 x 32

MATRIX

55

A

A

32

5

A

A6

A7

A8

A9

D

A

A

HM-6508/883