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CD4047BMS bảng dữ liệu(PDF) 7 Page - Intersil Corporation |
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CD4047BMS bảng dữ liệu(HTML) 7 Page - Intersil Corporation |
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7 / 15 page ![]() 7-903 CD4047BMS TABLE 9. FUNCTIONAL TERMINAL CONNECTIONS In all cases External resistor between terminals 2 and 3 (Note 1) External capacitor between terminals 1 and 3 (Note 1) FUNCTION TERMINAL CONNECTIONS OUTPUT PULSE FROM OUTPUT PERIOD OR PULSE WIDTH TO VDD TO VSS INPUT TO ASTABLE MULTIVIBRATOR Free Running 4, 5, 6, 14 7, 8, 9, 12 - 10, 11, 13 TA (10, 11) = 4.40 RC True Gating 4, 6, 14 7, 8, 9, 12 5 10, 11, 13 TA (13) = 2.20 RC (Note 2) Complement Gating 6, 14 5, 7, 8, 9, 12 4 10, 11, 13 MONOSTABLE MULTIVIBRATOR Positive Edge Trigger 4, 14 5, 6, 7, 9, 12 8 10, 11 tM (10, 11) = 2.48 RC Negative Edge Trigger 4, 8, 14 5, 7, 9, 12 6 10, 11 Retriggerable 4, 14 5, 6, 7, 9 8, 12 10, 11 External Countdown (Note 3) 14 5, 6, 7, 8, 9, 12 - 10, 11 NOTES: 1. See text. 2. First positive 1/2 cycle pulse width = 2.48 RC. See note follow Monostable Mode Design Information. 3. Input Pulse to Reset of External Counting Chip External Counting Chip Output to Terminal 4. Logic Diagrams FIGURE 1. CD4047BMS LOGIC BLOCK DIAGRAM Q Q 10 11 OSCILLATOR OUT LOW POWER ASTABLE MULTIVIBRATOR FREQUENCY DIVIDER ( ÷2) ASTABLE GATE CONTROL MONOSTABLE CONTROL RETRIGGER CONTROL 13 2 1 3 R-TIMING C-TIMING RC COMMON R C -TRIGGER ASTABLE +TRIGGER RETRIGGER EXTERNAL RESET ASTABLE 12 9 8 6 4 5 |
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