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L6208Q bảng dữ liệu(PDF) 13 Page - STMicroelectronics |
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L6208Q bảng dữ liệu(HTML) 13 Page - STMicroelectronics |
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13 / 34 page ![]() DocID018710 Rev 3 13/34 L6208Q Circuit description 34 5.2 Logic inputs Pins CONTROL, HALF/FULL, CLOCK, RESET and CW/CCW are TTL/CMOS and µC compatible logic inputs. The internal structure is shown in Figure 9. Typical values for turn- on and turn-off thresholds are respectively Vth(ON) = 1.8 V and Vth(OFF) = 1.3 V. Pin EN (Enable) has identical input structure with the exception that the drain of the overcurrent and thermal protection MOSFET is also connected to this pin. Due to this connection, some care must be taken in driving this pin. The EN input may be driven in one of two configurations, as shown in Figure 10 or 11. If driven by an open drain (collector) structure, a pull-up resistor REN and a capacitor CEN are connected, as shown in Figure 10. If the driver is a standard push-pull structure, the resistor REN and the capacitor CEN are connected, as shown in Figure 11. The resistor REN should be chosen in the range from 2.2 k to 180 k. Recommended values for REN and CEN are respectively 100 k and 5.6 nF. More information on selecting the values is found in Section 5.9. Figure 9. Logic inputs internal structure Figure 10. EN pins open collector driving Figure 11. EN pins push-pull driving |
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