82802AC datasheet(38/53 Pages) INTEL

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Intel

® 82802AB/AC Firmware Hub

Datasheet

5.2.3.2.

Signal Timing Parameters

Table 12.

Signal Timing Parameters

Symbol

PCI

Symbol

Parameter

Condition

Min.

Max.

Units

Notes

TCHQV

tval

CLK to data out

TCHQX

ton

CLK to active (float to active delay)

TCHQZ

toff

CLK to inactive (active to float delay)

TAVCH

TDVCH

tsu

Input setup time

TCHAX

TCHDX

Input hold time

TVSPL

trst

Reset active time after power stable

TCSPL

trst-clk

Reset active time after CLK stable

100

µs

TPLQZ

trst-off

Reset active to output float delay

Note:

1. Minimum and maximum times have different loads. See PCI spec.

2. For purposes of active/float timing measurements, the Hi-Z or Off state is defined as that in which

the total current delivered through the component pin is less than or equal to the leakage current

specification.

3. This parameter applies to any input type (excluding CLK).

Figure 8.

Output Timing Parameters

T_off

T_val

V_test

T_on

V_th

V_tl

CLK

FWH[3:0]

(Valid Output Data)

FWH[3:0]

(Float Output Data)

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