FC80960HD32SL2GL datasheet(83/102 Pages) INTEL

tên linh kiện	FC80960HD32SL2GL

Giải thích chi tiết về linh kiện	80960HA/HD/HT 32-Bit High-Performance Superscalar Processor

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80960HA/HD/HT

Advance Information Datasheet

D21

Bidirectional

D22

Bidirectional

D23

Bidirectional

D24

Bidirectional

D25

Bidirectional

D26

Bidirectional

D27

Bidirectional

D28

Bidirectional

D29

Bidirectional

D30

Bidirectional

D31

Bidirectional

BTERMBAR

Input

RDYBAR

Input

Appears as READYBAR in BSDL

file.

HOLD

Input

HOLDA

Output

Enable for HOLDA control

Control

ADSBAR

Output

BE3BAR

Output

Appears as BEBAR(3:0) in BSDL

file.

BE2BAR

Output

BE1BAR

Output

BE0BAR

Output

BLASTBAR

Output

DENBAR

Output

WRRDBAR

Output

Appears as WRBAR in BSDL file.

DTRBAR

Output

Enable for DTRBAR

Control

WAITBAR

Output

BSTALL

Output

DATACODBAR

Output

Appears as DCBAR in BSDL file.

USERSUPBAR

Output

Appears as SUPBAR in BSDL file.

Enable for ADSBAR, BEBAR,

BLASTBAR, DENBAR, WRRDBAR,

WAITBAR, DCBAR, SUPBAR and

LOCKBAR,

Control

Table 25. 80960Hx Boundary Scan Chain (Sheet 2 of 4)

BOUNDARY SCAN CELL

CELL TYPE

COMMENT

NOTES:

1. Cell#1 connects to TDO and cell #112 connects to TDI.

2. All outputs are three-state.

3. In output and bidirectional signals, a logical “1” on the enable signal enables the output. A logical “0”

three-states the output.

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