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IDT49C465 bảng dữ liệu(PDF) 13 Page - Integrated Device Technology |
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IDT49C465 bảng dữ liệu(HTML) 13 Page - Integrated Device Technology |
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13 / 38 page ![]() 11.7 13 IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT MILITARY AND COMMERCIAL TEMPERATURE RANGES 32-BIT DATA WORD CONFIGURATION A single IDT49C465 EDC unit, connected as shown below, provides all the logic needed for single-bit error correction, and double-bit error detection, of a 32-bit data field. The identification code (00) indicates 7 checkbits are required. The CBI7 pin should be tied high. The 39-bit data format for four bytes of data and 7 checkbits is indicated below. Syndrome bits are generated by an exclusive-OR of the generated checkbits with the checkbits read from memory. For example, Sn is the XOR of checkbits from those read with those generated. During Data Correction, the syndrome bits are used to complement (correct) single-bit errors in the data bits. 32-BIT DATA FORMAT 32-BIT HARDWARE CONFIGURATION BYTE 3 BYTE 2 BYTE 1 BYTE 0 DATA CHECKBITS C0 C1 C2 C3 C4 C5 C6 0 8 7 16 15 24 23 31 2552 drw 15 PCBI0–7 CBI7 CBI0–6 CBO0–6 SYO0–6 ERR MERR MD0–31 P0–3 SD0–31 SYNDROME–OUT MEMORY DATA I/O CHECKBITS–OUT CHECKBITS–IN SYSTEM DATA I/O CODE ID 1,0 = 00 VCC 7 8 32 32 7 7 IDT49C465 2552 drw 16 |
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