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ICS8530-01 bảng dữ liệu(PDF) 1 Page - Integrated Circuit Systems |
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ICS8530-01 bảng dữ liệu(HTML) 1 Page - Integrated Circuit Systems |
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1 / 12 page ![]() ICS8530DY-01 www.icst.com/products/hiperclocks.html REV. B AUGUST 8, 2001 1 Integrated Circuit Systems, Inc. ICS8530-01 LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER BLOCK DIAGRAM PIN ASSIGNMENT CLK nCLK Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 Q5 nQ5 Q6 nQ6 Q7 nQ7 Q15 nQ15 Q14 nQ14 Q13 nQ13 Q12 nQ12 Q11 nQ11 Q10 nQ10 Q9 nQ9 Q8 nQ8 HiPerClockS™ ,&6 FEATURES • 16 differential 3.3V LVPECL outputs • CLK, nCLK input pair • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • Maximum output frequency up to 500MHz • Translates any single-ended input signal to 3.3V LVPECL levels with a resistor bias on nCLK input • Output skew: 75ps (maximum) • Part-to-part skew: 250ps (maximum) • 3.3V output operating supply • 0°C to 70°C ambient operating temperature • Industrial temperature information available upon request GENERAL DESCRIPTION The ICS8530-01 is a low skew, 1-to-16 Differen- tial-to-3.3V LVPECL Fanout Buffer and a mem- ber of the HiPerClockS™ family of High Perfor- mance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input levels. The high gain differential amplifier accepts peak-to- peak input voltages as small as 150mV as long as the com- mon mode voltage is within the specified minimum and maxi- mum range. Guaranteed output and part-to-part skew characteristics make the ICS8530-01 ideal for those clock distribution appli- cations demanding well defined performance and repeatabil- ity. 48 47 46 45 44 43 42 41 40 39 38 37 13 14 15 16 17 18 19 20 21 22 23 24 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 VCCO Q11 nQ11 Q10 nQ10 VEE Q9 nQ9 Q8 nQ8 VCCO VCC CLK VCCO nQ0 Q0 nQ1 Q1 VEE nQ2 Q2 nQ3 Q3 Vcco ICS8530-01 48-Pin LQFP 7mm x 7mm x 1.4mm package body Y Package Top View |
Số phần tương tự - ICS8530-01 |
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Mô tả tương tự - ICS8530-01 |
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