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HMS91C8032 bảng dữ liệu(PDF) 72 Page - Hynix Semiconductor |
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HMS91C8032 bảng dữ liệu(HTML) 72 Page - Hynix Semiconductor |
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72 / 157 page ![]() HMS91C8032/97C8032 NOV., 2001 Ver 1.02 69 timer interrupt(Maskable Interrupt or Non Maskable Interrupt) are selected by WDTMK flag. If maskable interrupt is selected by WDTMK flag, the watchdog timer interrupt can be disabled by IEWDT flag of the IE3 register. Refer Figure 4-29. Watchdog timer restart After the watchdog timer starts, resetting RUNWDT flag to 1 makes the 8-bit watchdog counter restart from the initial value determined by WDTDR register. Once the watchdog timer starts, setting RUNWDT flag to 1 does not stop the watchdog timer. The watchdog timer continues operating in the IDLE mode but it stops in the Power Down mode. NOTE: OSC : System clock frequency Figure 4-29 Watchdog Timer Block Dragram MI NMI WDTMK RUNWDT WDTMD[2:0] ENWDT WDTDR Prescaler 8-bit Counter IRQWD fXX 1/1 1/23 1/24 1/25 1/27 1/29 1/211 1/213 WDTMD[2:0] Inadvertent Program Loop Detection Time 000 OSC (0.139us) 001 OSC / 2^3 (1.1us) 010 OSC / 2^4 (2.2us) 011 OSC / 2^5 (4.4us) 100 OSC / 2^7 (17.8us) 101 OSC / 2^9 (71.1us) 110 OSC / 2^11 (284us) 111 OSC / 2^13 (1138us) Table 4-28 Watchdog Timer Inadvertent Program Loop Detection Times |
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