8

Notes:

1. Peak Forward Input Current pulse width < 50

µs at 1 KHz maximum repetition rate.

2. Each channel of a multichannel device.

3. Duration of output short circuit time not to exceed 10 ms.

4. All devices are considered two-terminal devices: measured between all input leads or terminals shorted together and all output leads

or terminals shorted together.

5. This is a momentary withstand test, not an operating condition.

6. CM

L

is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in the logic low state (V

O

< 0.8 V). CM

H

is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic

high state (V

O

> 2.0 V).

7. t

PHL

propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.3 V point on the leading edge

of the output pulse. The t

PLH

propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.3 V

point on the trailing edge of the output pulse.

8. Measured between each input pair shorted together and all output connections for that channel shorted together.

9. Measured between adjacent input pairs shorted together for each multichannel device.

10. Zero-bias capacitance measured between the LED anode and cathode.

11. Standard parts receive 100% testing at 25

°C (Subgroups 1 and 9). SMD, Class H and Class K parts receive 100% testing at 25, 125,

and –55

°C (Subgroups 1 and 9, 2 and 10, 3 and 11, respectively).

12. Parameters are tested as part of device initial characterization and after design and process changes. Parameters guaranteed to limits

specified for all lots not specifically tested.

Single Channel Product Only

Parameter

Symbol

Typ.

Units

Test Conditions

Fig.

Notes

Output Enable Time to Logic High

30

ns

8

Output Enable Time to Logic Low

30

ns

8

Output Disable Time from Logic High

45

ns

8

Output Disable Time from Logic Low

55

ns

8

Dual and Quad Channel Products Only

Input-Input Insulation Leakage Current

0.5

nA

9

Resistance (Input-Input)

Ω

9

Capacitance (Input-Input)

1.5

pF

f = 1 MH

9

Typical Characteristics (cont’d.)

Figure 1. Typical Logic Low Output

Voltage vs. Temperature.

Figure 2. Typical Logic High Output

Current vs. Temperature.