HCPL-2201 datasheet(9/11 Pages) HP

9 / 11 page

1-128

IF (ON)

50 % IF (ON)

0 mA

tPLH

tPHL

VOH

1.3 V

VOL

INPUT IF

OUTPUT

Figure 2. Typical Logic High Output

Current vs. Temperature.

Figure 3. Output Voltage vs. Forward

Input Current.

Figure 4. Typical Input Diode Forward

Characteristic.

Figure 1. Typical Logic Low Output

Voltage vs. Temperature.

Notes:

1. Derate total package power dissipa-

tion, PT, linearly above 70°C free air

temperature at a rate of 4.5 mW/

°C.

2. Duration of output short circuit time

should not exceed 10 ms.

3. Device considered a two-terminal

device: pins 1, 2, 3, and 4 shorted

together and pins 5, 6, 7, and 8

shorted together.

4. The tPLH propagation delay is

measured from the 50% point on the

leading edge of the input pulse to the

1.3 V point on the leading edge of the

output pulse. The tPHL propagation

delay is measured from the 50% point

on the trailing edge of the input pulse

to the 1.3 V point on the trailing edge

of the output pulse.

5. When the peaking capacitor is omitted,

propagation delay times may increase

by 100 ns.

6. CML is the maximum rate of rise of the

common mode voltage that can be

sustained with the output voltage in the

logic low state (VO < 0.8 V). CMH is

the maximum rate of fall of the

common mode voltage that can be

-60

-8

TA – TEMPERATURE – °C

100

-20

-5

-40

-3

-1

-6

VCC = 4.5 V

IF = 5 mA

-7

-4

-2

VO = 2.7 V

VO = 2.4 V

1.1

0.001

VF – FORWARD VOLTAGE – V

1.0

1000

1.3

0.01

1.5

1.2

1.4

0.1

TA = 25 °C

100

–

sustained with the output voltage in the

logic high state (VO > 2.0 V).

7. Use of a 0.1

µF bypass capacitor

connected between pins 5 and 8 is

recommended.

8. In accordance with UL1577, each

optocoupler is proof tested by applying

an insulation test voltage

≥ 3000 V rms

for one second (leakage detection

current limit, II-O ≤ 5 µA). This test is

performed before the 100% production

test for partial discharge (Method b)

shown in the VDE 0884 Insulation

Characteristics Table, if applicable.

Figure 5. Test Circuit for tPLH, tPHL, tr, and tf.

-60

TA – TEMPERATURE – °C

100

1.0

-20

0.4

-40

0.6

0.8

0.2

VCC = 4.5 V

IF = 0 mA

VO = 6.4 mA

0.1

0.3

0.5

0.7

0.9

IF – INPUT CURRENT – mA

2.0

1.0

0.5

IOL = 6.4 mA

IOH = -2.6 mA

1.5

VCC = 4.5 V

TA = 25 °C

HCPL-2200

GND

VCC

5 V

619

Ω

INPUT

MONITORING

NODE

PULSE GEN.

tr = tf = 5 ns

f = 100 kHz

10 % DUTY

CYCLE

VO = 5 V

C2 =

15 pF

THE PROBE AND JIG CAPACITANCES

ARE INCLUDED IN C1 AND C2.

OUTPUT VO

MONITORING

NODE

VCC

5 k

Ω

C1 =

120 pF

IF (ON)

2.15 k

Ω

1.6 mA

1.10 k

Ω

3 mA

681

Ω

5 mA

ALL DIODES ARE 1N916 OR 1N3064.

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