Block Diagram

Note: The address/data pins are available in various combinations

(refer to the address/data table).

Pin Description

Pin Name

I/O

Internal

Connection

Description

A0~A17

I

TRANSMISSION

GATE

Input pins for address A0~A17 setting

They can be externally set to VDD, VSS, or left open.

D10~D17

O

CMOS OUT

Output data pins

DIN

I

CMOS IN

Serial data input pin

VT

O

CMOS OUT

Valid transmission, active high

OSC1

I

OSCILLATOR

Oscillator input pin

OSC2

O

OSCILLATOR

Oscillator output pin

VSS

I

—

Negative power supply (GND)

VDD

I

—

Positive power supply

3

3

2nd Oct ’97