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PIR21844 bảng dữ liệu(PDF) 2 Page - International Rectifier

tên linh kiện PIR21844
Giải thích chi tiết về linh kiện  HALF-BRIDGE DRIVER
PDF  24 Pages
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nhà sản xuất  IRF [International Rectifier]
Trang chủ  http://www.irf.com
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PIR21844 bảng dữ liệu(HTML) 2 Page - International Rectifier

  PIR21844 Datasheet HTML 1Page - International Rectifier PIR21844 Datasheet HTML 2Page - International Rectifier PIR21844 Datasheet HTML 3Page - International Rectifier PIR21844 Datasheet HTML 4Page - International Rectifier PIR21844 Datasheet HTML 5Page - International Rectifier PIR21844 Datasheet HTML 6Page - International Rectifier PIR21844 Datasheet HTML 7Page - International Rectifier PIR21844 Datasheet HTML 8Page - International Rectifier PIR21844 Datasheet HTML 9Page - International Rectifier Next Button
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IR2184(4)(S)&(PbF)
2
www.irf.com
Symbol
Definition
Min.
Max.
Units
VB
High side floating absolute voltage
-0.3
625
VS
High side floating supply offset voltage
VB - 25
VB + 0.3
VHO
High side floating output voltage
VS - 0.3
VB + 0.3
VCC
Low side and logic fixed supply voltage
-0.3
25
VLO
Low side output voltage
-0.3
VCC + 0.3
DT
Programmable dead-time pin voltage (IR21844 only)
VSS - 0.3
VCC + 0.3
VIN
Logic input voltage (IN & SD)
VSS - 0.3
VSS + 10
VSS
Logic ground (IR21844 only)
VCC - 25
VCC + 0.3
dVS/dt
Allowable offset supply voltage transient
—
50
V/ns
PD
Package power dissipation @ TA ≤ +25°C
(8-lead PDIP)
—
1.0
(8-lead SOIC)
—
0.625
(14-lead PDIP)
—
1.6
(14-lead SOIC)
—
1.0
RthJA
Thermal resistance, junction to ambient
(8-lead PDIP)
—
125
(8-lead SOIC)
—
200
(14-lead PDIP)
—
75
(14-lead SOIC)
—
120
TJ
Junction temperature
—
150
TS
Storage temperature
-50
150
TL
Lead temperature (soldering, 10 seconds)
—
300
V
°C
°C/W
W
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15V differential.
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: IN and SD are internally clamped with a 5.2V zener diode.
VB
High side floating supply absolute voltage
VS + 10
VS + 20
VS
High side floating supply offset voltage
Note 1
600
VHO
High side floating output voltage
VS
VB
VCC
Low side and logic fixed supply voltage
10
20
VLO
Low side output voltage
0
VCC
VIN
Logic input voltage (IN & SD)
VSS
VSS + 5
DT
Programmable dead-time pin voltage (IR21844 only)
VSS
VCC
VSS
Logic ground (IR21844 only)
-5
5
TA
Ambient temperature
-40
125
°C
V
Symbol
Definition
Min.
Max.
Units



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