SDA

SCL

1

8

2

3

7

6

5

8

10

4

9

1

7

LP55281

SNVS458B – JUNE 2007 – REVISED JUNE 2007

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Symbol

Parameter

Limit

Units

Min

Max

1

Hold Time (repeated)

0.6

µs

START condition

2

Clock Low Time

1.3

µs

3

Clock High Time

600

ns

4

Setup Time for a Repeated

600

ns

START Condition

5

Data Hold Time

50

ns

6

Data Setup TIme

100

ns

7

Rise Time of SDA and SCL

300

ns

8

Fall Time of SDA and SCL

300

ns

9

Set-up Time for STOP

600

ns

condition

10

Bus Free Time between a

1.3

µs

STOP and a START

Condtion

Capacitive Load for Each

10

200

pF

Bus Line

NOTE

Data guaranteed by design

Recommended External Components

tantalums under all load conditions. Capacitor voltage rating must be sufficient, 10V or greater is recommended.

Some ceramic capacitors, espesically those in small packages, exhibit a strong capacitance reduction with the

increased applied voltage. The capacitance value can fall to below half of the nominal capacitance. Too low

output capacitance will increase the noise and it can make the boost converter unstable.

recommended.

26

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