STCD23-0 datasheet(11/39 Pages) STMICROELECTRONICS

11 / 39 page

STCD22x0, STCD23x0, STCD24x0

Device overview

Doc ID 15400 Rev 2

11/39

Table 4.

Pin functions (STCD24x0, 4-channel)

number

name

Description

VCC

Supply voltage (decouple with a 1 µF capacitor to GND)

VTCXO LDO output for external clock source (decouple with a 1 µF capacitor to GND)

MCLK

Master clock input

OPT2

Optional pin 2. Connect to VCC or GND on PC board to field configure EN3 and

EN4 active high/low. Refer to

Section 3.2: Enable polarity for detailed

information.

BYP

Bypass capacitor input pin (10 nF capacitor should be connected to GND in

order to improve thermal noise performance)

GND

Supply ground

MCREQ Master clock request signal (open drain, active low)

OPT1

Optional pin 1. Connect to VCC or GND on PC board to field configure EN1 and

EN2 active high/low. Refer to

Section 3.2: Enable polarity for detailed

information.

CLK1

Clock output channel - output 1

EN1

Clock output channel enable-1 (active high/low OPT1 field programmable)

EN4

Clock output channel enable-4 (active high/low OPT2 field programmable)

CLK4

Clock output channel - output 4

CLK2

Clock output channel - output 2

EN2

Clock output channel enable-2 (active high/low OPT1 field programmable)

EN3

Clock output channel enable-3 (active high/low OPT2 field programmable)

CLK3

Clock output channel - output 3

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