FT313HQ-R datasheet(35/67 Pages) ETC2

35 / 67 page

Document No.: FT_000589

FT313H USB2.0 HS Host Controller Datasheet Version 1.2

Clearance No.: FTDI# 318

Bit

Name

Type

Default value

Description

1: enable DMA

DMA_ABORT

R/W

1'b0

DMA abort

0: DMA continuous running

1: DMA abort implement

Table 5-20 DMA configuration register

5.3.10

AUX_MEMADDR register (address = 98h)

Bit

Name

Type

Default

value

Description

[15: 0]

AUX_START_ADDR_MEM R/W

16’b0

Auxiliary start address of memory

read / write

When memory is occurred by DMA, use

auxiliary start address for PIO memory

access.

Table 5-21 AUX Memory address register

5.3.11

AUX_DATAPORT register (address = 9Ah)

Bit

Name

Type

Default value

Description

[15: 0]

AUX_DATA_PORT

R/W

16’b0

Auxiliary data port

When memory is occurred by DMA, use

auxiliary data port for PIO memory access.

Table 5-22 AUX data port register

5.3.12

SLEEPTIMER register (address = 9Ch)

Bit

Name

Type

Default value

Description

[15: 0]

SLEEP_TIMER

R/W

16’b0400

Sleep timer

When host controller detected USB bus has no

activity, the sleep timer will be started. When

timer reduce to zero, the BUSINACTIVE

interrupt will be generated, if the respective

enable bit in the HCINTEN register is set.

Default sleep timer is approximately 10ms.

Table 5-23 Sleep timer register

5.4 Interrupt registers

5.4.1 HCINTSTS register (address = A0h)

Bit

Name

Type

Default value

Description

[15: 8]

Reserved

10’b0

WAKEUPINT

R/WC

1’b0

Wake up interrupt on device connect or

FT313HQ-R bảng dữ liệu(PDF) 35 Page - List of Unclassifed Manufacturers

FT313HQ-R bảng dữ liệu(HTML) 35 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67

bảng dữ liệu tải về

Link URL