| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
OPA690IDBVT bảng dữ liệu(PDF) 25 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
OPA690IDBVT bảng dữ liệu(HTML) 25 Page - Texas Instruments |
|
25 / 37 page ![]() OPA690 www.ti.com SBOS223F – DECEMBER 2001 – REVISED FEBRUARY 2010 THERMAL ANALYSIS As a worst-case example, compute the maximum TJ using an OPA690IDBV (SOT23-6 package) in the Due to the high output power capability of the circuit of Figure 36 operating at the maximum OPA690, heatsinking or forced airflow may be specified ambient temperature of +85°C and driving a required under extreme operating conditions. grounded 20 Ω load. Maximum desired junction temperature will set the maximum allowed internal power dissipation as PD = 10V × 6.2mA + 5 2/(4 × (20Ω || 804Ω)) = 382mW described below. In no case should the maximum Maximum TJ = +85°C + (0.38W × 150°C/W) = 142°C. junction temperature be allowed to exceed 175°C. Although this is still well below the specified Operating junction temperature (TJ) is given by TA + maximum junction temperature, system reliability PD × qJA. The total internal power dissipation (PD) is considerations may require lower tested junction the sum of quiescent power (PDQ) and additional temperatures. The highest possible internal power dissipated in the output stage (PDL) to deliver dissipation will occur if the load requires current to be load power. Quiescent power is simply the specified forced into the output for positive output voltages or no-load supply current times the total supply voltage sourced from the output for negative output voltages. across the part. PDL depends on the required output This puts a high current through a large internal signal and load but, for a grounded resistive load, be voltage drop in the output transistors. Figure 19, the at a maximum when the output is fixed at a voltage output V-I plot shown in the ±5V Typical equal to 1/2 of either supply voltage (for equal bipolar Characteristics, include a boundary for 1W maximum supplies). Under this condition, PDL = VS2/(4 × RL) internal power dissipation under these conditions. where RL includes feedback network loading. Note that it is the power in the output stage and not into the load that determines internal power dissipation. Copyright © 2001–2010, Texas Instruments Incorporated 25 Product Folder Link(s): OPA690 |
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |