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EM73P461 bảng dữ liệu(PDF) 35 Page - ELAN Microelectronics Corp

tên linh kiện EM73P461
Giải thích chi tiết về linh kiện  4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
PDF  38 Pages
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nhà sản xuất  EMC [ELAN Microelectronics Corp]
Trang chủ  http://www.emc.com.tw
Logo EMC - ELAN Microelectronics Corp

EM73P461 bảng dữ liệu(HTML) 35 Page - ELAN Microelectronics Corp

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* This specification are subject to be changed without notice.
EM73P461A
EM73P461A
EM73P461A
EM73P461A
EM73P461A
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
12.27.2001
Preliminary
Preliminary
Preliminary
Preliminary
Preliminary
(7) Compare
(7) Compare
(7) Compare
(7) Compare
(7) Compare
Mnemonic
Object code (binary)
Mnemonic
Object code (binary)
Mnemonic
Object code (binary)
Mnemonic
Object code (binary)
Mnemonic
Object code (binary)
Operation description
Operation description
Operation description
Operation description
Operation description
Byte
Byte
Byte
Byte
Byte
Cycle
Cycle
Cycle
Cycle
Cycle
Flag
Flag
Flag
Flag
Flag
C
C
C
C
C
Z
Z
Z
Z
Z
S
S
S
S
S
CMP
#k,y 0100 1011 kkkk yyyy
k-RAM[y]
2
2
C
Z
Z'
CMPA x
0110 1011 xxxx xxxx
RAM[x]-Acc
2
2
C
Z
Z'
CMPAM
0111 0011
RAM[HL] - Acc
1
1
C
Z
Z'
CMPH #k
0110 1110 1011 kkkk
k - HR
2
2
-
Z
C
CMPIA #k
1011 kkkk
k - Acc
1
1
C
Z
Z'
CMPL #k
0110 1110 0011 kkkk
k-LR
2
2
-
Z
C
(8) Bit manipulation
(8) Bit manipulation
(8) Bit manipulation
(8) Bit manipulation
(8) Bit manipulation
Mnemonic
Object code (binary)
Mnemonic
Object code (binary)
Mnemonic
Object code (binary)
Mnemonic
Object code (binary)
Mnemonic
Object code (binary)
Operation description
Operation description
Operation description
Operation description
Operation description
Byte
Byte
Byte
Byte
Byte
Cycle
Cycle
Cycle
Cycle
Cycle
Flag
Flag
Flag
Flag
Flag
C
C
C
C
C
Z
Z
Z
Z
Z
S
S
S
S
S
CLM
b
1111 00bb
RAM[HL]
b←01
1
-
-
1
CLP
p,b
0110 1101 11bb pppp
PORT[p]
b←02
2
-
-
1
CLPL
0110 0000
PORT[LR
3-2+4]
LR
1-0←01
2
-
-
1
CLR
y,b
0110 1100 11bb yyyy
RAM[y]
b←02
2
-
-
1
SEM
b
1111 01bb
RAM[HL]
b←11
1
-
-
1
SEP
p,b
0110 1101 01bb pppp
PORT[p]
b←12
2
-
-
1
SEPL
0110 0010
PORT[LR
3-2+4]LRl-0←11
2
-
-
1
SET
y,b
0110 1100 01bb yyyy
RAM[y]
b←12
2
-
-
1
TF
y,b
0110 1100 00bb yyyy
SF
←RAM[y]
b'2
2
-
-
*
TFA
b
1111 10bb
SF
←Acc
b'1
1
-
-
*
TFM
b
1111 11bb
SF
←RAM[HL]
b'1
1
-
-
*
TFP
p,b
0110 1101 00bb pppp
SF
←PORT[p]
b'2
2
-
-
*
TFPL
0110 0001
SF
←PORT[LR
3-2+4]LR1-0'1
2
-
-
*
TT
y,b
0110 1100 10bb yyyy
SF
←RAM[y]
b
22
-
-
*
TTP
p,b
0110 1101 10bb pppp
SF
←PORT[p]
b
22
-
-
*
(9) Subroutine
(9) Subroutine
(9) Subroutine
(9) Subroutine
(9) Subroutine
Mnemonic
Object code (binary)
Mnemonic
Object code (binary)
Mnemonic
Object code (binary)
Mnemonic
Object code (binary)
Mnemonic
Object code (binary)
Operation description
Operation description
Operation description
Operation description
Operation description
Byte
Byte
Byte
Byte
Byte
Cycle
Cycle
Cycle
Cycle
Cycle
Flag
Flag
Flag
Flag
Flag
C
C
C
C
C
Z
Z
Z
Z
Z
S
S
S
S
S
LCALL a
0100 0aaa aaaa aaaa
STACK[SP]
←PC,
2
2
-
-
-
SP
←SP -1, PC←a
SCALL a
1110 nnnn
STACK[SP]
←PC,
1
2
-
-
-
SP
←SP - 1, PC←a,
a = 8n +6 (n=1~15),0086h (n =0)
RET
0100 1111
SP
←SP + 1, PC←STACK[SP]
1
2
-
-
-



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