L6747C

Device description and operation

Doc ID 17127 Rev 1

9/15

4.1

High-impedance (HiZ) management

The driver is capable of managing a high-impedance conditions by keeping all MOSFETs in

an OFF state. This is achieved in two different ways:

●

If the EN signal is pulled low, the device keeps all MOSFETs OFF regardless of the

PWM status.

●

When EN is asserted, if the PWM signal is externally set within the HiZ window for a

time greater than the hold-off time, the device detects the HiZ condition and turns off all

the MOSFETs. The HiZ window is defined as the PWM voltage range between

The device exits from the HiZ state after any PWM transition. See Figure 4 for details about

HiZ timing.

The implementation of the high-impedance state allows the controller connected to the

driver to manage the high-impedance state of its output, preventing the generation of nega-

tive undershoot on the regulated voltage during the shutdown stage. Also, different power

management states may be managed, such as pre-bias startup.

4.2

Preliminary OV protection

preliminary OV protection.

The intent of this protection feature is to protect the load during system startup, especially

from high-side MOSFET failures. In fact, VRM, and more generally PWM, controllers, have a

thresholds (which is in the range of about 10 V). In cases of high-side MOSFET failure, the

tures are implemented). However, in this case the output voltage is already at the same volt-

age (~10 V) and the load (a CPU in most cases) is already burnt.

The L6747C bypasses the PWM controller by latching on the low-side MOSFET if the

PHASE pin voltage exceeds 2 V during the HiZ state. When the PWM input exits from the

HiZ window, the protection is reset and the control of the output voltage is transferred to the

controller connected to the PWM input.

Since the driver has its own UVLO threshold, a simple way to provide protection to the out-

side MOSFET is driven with 5 V. This ensures reliable protection of the load.

Preliminary OV is active after UVLO and while the driver is in an HiZ state, and it is disabled

after the first PWM transition. The controller must manage its output voltage from that

moment on.

4.3

BOOT capacitance design

The bootstrap capacitor value should be selected to obtain a negligible discharge due to the

turning on of the high-side MOSFET. It must provide a stable voltage supply to the high-side

driver during the MOSFET turn-on, and minimize the power dissipated by the embedded

boot diode. Figure 5 illustrates some guidelines on how to select the capacitance value for

the bootstrap according to the desired discharge, and the selected MOSFET.