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SP4309 bảng dữ liệu(PDF) 4 Page - SIPAT Co,Ltd |
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SP4309 bảng dữ liệu(HTML) 4 Page - SIPAT Co,Ltd |
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4 / 8 page ![]() Product Specification SP4309 Page 4 of 9 Evaluation Kit The Digital Attenuator Evaluation Kit board was designed to ease customer evaluation of the SP4309 Digital Step Attenuator. Connect J2 by mini clip to Vdd to power the IC. Connect J8 by mini clip to power the evaluation board support circuits. The control bits for the six parallel data inputs (C0.5 to C16) are controlled using S2-S7 to select bits or bit combinations. This allows any attenuation setting to be specified as shown in Table 6. The de-embed trace (J6 to J7) estimates the PCB insertion loss for removal from the evaluation board measurement data. To evaluate using customer software, J1 can be installed using a standard 0.100 IDC header (some circuit modification required, see schematic). The ability to supply different voltages for the Control circuitry (using J8) and IC Vdd (using J2) circuits allows for evaluation of circuits using different control vs. supply voltages. Figure 5. Evaluation Board Layout Figure 6. Evaluation Board Schematic Tel: +86-23-62808818 Fax: +86-23-62805284 www.sipatsaw.com / sawmkt@sipat.com |
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