Product Specification

SP4302

Page 5 of 10

Table 2. Pin Descriptions

Electrostatic Discharge (ESD) Precautions

When handling this CMOS device, observe the

same precautions that you would use with other ESD-

sensitive devices. Although this device contains

circuitry to protect it from damage due to ESD,

precautions should be taken to avoid exceeding the

rate specified in Table 3.

Exposed Solder Pad Connection

The exposed solder pad on the bottom of the package

must be grounded for proper device operation.

external series capacitor.

2: Latch Enable (LE) has an internal 100 k

Ωresistor to V

DD.

3: Connect pin 12 to GND to enable internal negative voltage

disable internal negative voltage generator.

4. Place a 10 k

Ωresistor in series, as close to pin as possible to

avoid frequency resonance.

Figure 14. Pin Configuration (Top View)

1

15

14

13

12

11

2

3

4

5

C16

RF1

Data

Clock

LE

GND

Vss/GND

P/S

RF2

C8

20-lead QFN

4x4mm

Exposed Solder Pad

Pin

No.

Pin

Name

Description

1

C16

Attenuation control bit, 16dB (Note 4).

2

RF1

RF port (Note 1).

3

Data

Serial interface data input (Note 4).

4

Clock

Serial interface clock input.

5

LE

Latch Enable input (Note 2).

6

Power supply pin.

7

PUP1

Power-up selection bit, MSB.

8

PUP2

Power-up selection bit, LSB.

9

Power supply pin.

10

GND

Ground connection.

11

GND

Ground connection.

12

Negative supply voltage or GND

connection(Note 3)

13

P/S

Parallel/Serial mode select.

14

RF2

RF port (Note 1).

15

C8

Attenuation control bit, 8 dB.

16

C4

Attenuation control bit, 4 dB.

17

C2

Attenuation control bit, 2 dB.

18

GND

Ground connection.

19

C1

Attenuation control bit, 1 dB.

20

C0.5

Attenuation control bit, 0.5 dB.

Paddle

GND

Ground for proper operation

Latch-Up Avoidance

Unlike conventional CMOS devices, CMOS devices

are immune to latch-up.

Switching Frequency

The SP4302 has a maximum 25 kHz switching rate.

Resistor on Pin 1 & 3

A 10 k

Ω resistor on the inputs to Pin 1 & 3 (see Figure

16) will eliminate package resonance between the RF

input pin and the two digital inputs. Specified

attenuation error versus frequency performance is

dependent upon this condition.

Table 3. Absolute Maximum Ratings

Table 4. Operating Ranges

Symbol

Parameter/Conditions

Min

Max

Units

Power supply voltage

-0.3

4.0

V

Voltage on any DC input

-0.3

0.3

V

Storage temperature range

-65

150

°C

P

IN

Input power (50

Ω)

+30

dBm

ESD voltage (Human Body

Model)

500

V

Parameter

Min

Typ

Max

Units

Voltage

2.7

3.0

3.3

V

Current

100

µA

Digital Input High

V

Digital Input Low

V

Digital Input Leakage

1

µA

Input Power

+24

dBm

Temperature range

-40

85

°C

Exceeding absolute maximum ratings may cause per-

manent damage. Operation should be restricted to the

limits in the Operating Ranges table. Operation be-

tween operating range maximum and absolute maxi-

mum for extended periods may reduce reliability.

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