VIPER25LDTR datasheet(15/40 Pages) STMICROELECTRONICS

15 / 40 page

VIPER25

Operation description

Doc ID 15585 Rev 4

15/40

Operation description

VIPER25 is a high-performance low-voltage PWM controller IC with an 800 V, avalanche

rugged power section.

The controller includes the current-mode PWM logic and the ZCD (zero current detect)

circuit for QR operation, the start-up circuitry with soft-start feature, an oscillator for

frequency foldback function, the current limit circuit with adjustable set point, the second

overcurrent circuit, the burst mode management circuit, the brown-out circuit, the UVLO

circuit, the auto-restart circuit and the thermal shutdown circuit.

The current limit set-point is set by the ZCD pin. The burst mode operation guaranties high

performance in the stand-by mode and helps in the energy saving norm accomplishment

All the fault protections are built in auto-restart mode with very low repetition rate to prevent

IC's over heating.

7.1

Power section and gate driver

The power section is implemented with an avalanche ruggedness N-channel MOSFET,

which guarantees safe operation within the specified energy rating as well as high dv/dt

capability. The power section has a BVDSS of 800 V min. and a typical RDS(on)

of 7

Ω at 25 °C.

The integrated SenseFET structure allows a virtually loss-less current sensing.

The gate driver is designed to supply a controlled gate current during both turn-on and turn-

off in order to minimize common mode EMI. Under UVLO conditions an internal pull-down

circuit holds the gate low in order to ensure that the Power section cannot be turned on

accidentally.

7.2

High voltage startup generator

The HV current generator is supplied through the DRAIN pin and it is enabled only if the

input bulk capacitor voltage is higher than VDRAIN_START threshold, reported on Table 7 on

page 7. When the HV current generator is ON, the IDDch current (see Table 7 on page 7) is

delivered to the capacitor on the VDD pin. In case of Auto-restart mode after a fault event,

the IDDch current is reduced to 0.6 mA, in order to have a slow duty cycle during the restart

phase.

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