DS2172T datasheet(13/21 Pages) DALLAS

tên linh kiện	DS2172T

Giải thích chi tiết về linh kiện	Bit Error Rate Tester BERT

PDF	21 Pages

Scroll/Zoom	100%

nhà sản xuất	DALLAS [Dallas Semiconductor]

Trang chủ	https://www.maximintegrated.com/en.html

Logo

13 / 21 page

DS2172

13 of 21

SR: STATUS REGISTER (Address=14 Hex)

(MSB)

(LSB)

RA1

RA0

RLOS

BED

BCOF

BECOF

SYNC

SYMBOL

POSITION

NAME AND DESCRIPTION

-SR.7

Not Assigned. Could be any value when read.

RA1

SR.6

Receive All Ones. Set when 32 consecutive 1s are received;

allowed to be cleared when a 0 is received.

RA0

SR.5

Receive All Zeros. Set when 32 consecutive 0s are received;

allowed to be cleared when a 1 is received.

RLOS

SR.4

Receive Loss Of Sync. Set when the device is searching for

synchronization. Once sync is achieved, will remain set until

read.

BED

SR.3

Bit Error Detection. Set when bit errors are detected.

BCOF

SR.2

Bit Counter Overflow. Set when the 32-bit BCR overflows.

BECOF

SR.1

Bit Error Count Overflow. Set when the 32-bit BECR

overflows.

SYNC

SR.0

Sync. Real time status of the synchronizer (this bit is not

latched). Will be set when synchronization is declared. Will be

cleared when 6 or more bits out of 64 are received in error (if

PCR.2 = 0).

DS2172T bảng dữ liệu(PDF) 13 Page - Dallas Semiconductor

DS2172T bảng dữ liệu(HTML) 13 Page - Dallas Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

bảng dữ liệu tải về

Link URL