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DS2152 bảng dữ liệu(PDF) 43 Page - Dallas Semiconductor |
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DS2152 bảng dữ liệu(HTML) 43 Page - Dallas Semiconductor |
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43 / 94 page ![]() DS2152 43 of 93 TDS0M: TRANSMIT DS0 MONITOR REGISTER (Address=1A Hex) (MSB) (LSB) B1 B2 B3 B4 B5 B6 B7 B8 SYMBOL POSITION NAME AND DESCRIPTION B1 TDS0M.7 Transmit DS0 Channel Bit 1. MSB of the DS0 channel (first bit to be transmitted). B2 TDS0M.6 Transmit DS0 Channel Bit 2. B3 TDS0M.5 Transmit DS0 Channel Bit 3. B4 TDS0M.4 Transmit DS0 Channel Bit 4. B5 TDS0M.3 Transmit DS0 Channel Bit 5. B6 TDS0M.2 Transmit DS0 Channel Bit 6. B7 TDS0M.1 Transmit DS0 Channel Bit 7. B8 TDS0M.0 Transmit DS0 Channel Bit 8. LSB of the DS0 channel (last bit to be transmitted). CCR6: COMMON CONTROL REGISTER 6 (Address=1E Hex) [repeated here from section 3 for convenience] (MSB) (LSB) RJC - - RCM4 RCM3 RCM2 RCM1 RCM0 SYMBOL POSITION NAME AND DESCRIPTION RJC CCR6.7 Receive Japanese CRC Enable. See Section 3 for details. - CCR6.6 Not Assigned. Should be set to 0 when written. - CCR6.5 Not Assigned. Should be set to 0 when written. RCM4 CCR6.4 Receive Channel Monitor Bit 4. MSB of a channel decode that determines which receive DS0 channel data will appear in the RDS0M register. RCM3 CCR6.3 Receive Channel Monitor Bit 3. RCM2 CCR6.2 Receive Channel Monitor Bit 2. RCM1 CCR6.1 Receive Channel Monitor Bit 1. RCM0 CCR6.0 Receive Channel Monitor Bit 0. LSB of the channel decode that determines which receive DS0 channel data will appear in the RDS0M register. |
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