DS1672 datasheet(2/13 Pages) DALLAS

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DS1672

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DS1672 BLOCK DIAGRAM Figure 1

ADDRESS MAP

The counter is accessed by reading or writing the first 4 bytes of the DS1672 (00h - 03h). The control

in Figure 2. If the master continues to send or request more data after the address pointer has reached

05h, the address pointer will wrap around to location 00h.

DS1672 REGISTERS Figure 2

Address

B5B4B3B2B1B0

Function

00h

Counter

Byte 1

01h

Counter

Byte 2

02h

Counter

Byte 3

03h

Counter

Byte 4

04h

EOSC

Control

05h

TCS

Trickle

Charger

DATA RETENTION MODE

The device is fully accessible and data can be written and ready only when VCC is greater than VPF.

However, when VCC falls below V

PF, (point at which write protection occurs) the internal clock registers

are blocked from any access. If VPF is less than VBACKUP, the device power is switched from VCC to

VBACKUP when VCC drops below VPF. If VPF is greater than VBACKUP, the device power is switched from

VCC to VBACKUP when VCC drops below VBACKUP. The registers are maintained from the VBACKUP source

until VCC is returned to nominal levels.

32-BIT

COUNTER

(4 BYTES)

SERIAL BUS

INTERFACE

OSCILLATOR

AND DIVIDER

POWER

CONTROL

ADDRESS

CONTROL

LOGIC

VCC

VBACKUP

GND

SCL

SDA

CONTROL

TRICKLE CHARGER

RST

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