11 / 36 page
CY7C0430V
PRELIMINARY
11
JTAG Timing and Switching Waveforms
Parameter
Description
CY7C0430V
Unit
–133
–100
Min.
Max.
Min.
Max.
fJTAG
Maximum JTAG TAP Controller Frequency
10
10
MHz
tTCYC
TCK Clock Cycle Time
100
100
ns
tTH
TCK Clock High Time
40
40
ns
tTL
TCK Clock Low Time
40
40
ns
tTMSS
TMS Setup to TCK Clock Rise
10
10
ns
tTMSH
TMS Hold After TCK Clock Rise
10
10
ns
tTDIS
TDI Setup to TCK Clock Rise
10
10
ns
tTDIH
TDI Hold after TCK Clock Rise
10
10
ns
tTDOV
TCK Clock Low to TDO Valid
20
20
ns
tTDOX
TCK Clock Low to TDO Invalid
0
0
ns
Test Clock
Test Mode Select
TCK
TMS
Test Data-In
TDI
Test Data-Out
TDO
tTCYC
tTMSH
tTL
tTH
tTMSS
tTDIS
tTDIH
tTDOX
tTDOV
Vietnamese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
