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CPC5602C

DS-CPC5602C-Rev. 1

The CPC5602C is an “N” channel depletion mode Field

Effect Transistor (FET) that utilizes Clare’s proprietary

third generation vertical DMOS process. The third

generation process realizes world class, high voltage

MOSFET performance in an economical silicon gate

process. The vertical DMOS process yields a highly

reliable device particularly in difficult application

environments such as telecommunications.

One of the primary applications for the CPC5602C is as

Access Arrangements (DAA) Devices (CPC5610A,

CPC5611A, CPC5604A).

The CPC5602C has a typical on-resistance of 8

Ω, a

breakdown voltage exceeding 350V and is available in

an SOT-223 package. As with all MOS devices, the FET

structure prevents thermal runaway and thermal-induced

secondary breakdown.

Features

Description

N Channel Depletion Mode FET

Ordering Information

Part #

Description

CPC5602C

N-Channel Depletion Mode FET,

SOT-223 Package

CPC5602CTR N-Channel Depletion Mode, SOT-

223 Package

Data Access Arrangement (DAA)

Absolute Maximum Ratings are stress ratings. Stresses in

excess of these ratings can cause permanent damage to

the device. Functional operation of the device at these or

any other conditions beyond those indicated in the opera-

tional sections of this data sheet is not implied. Exposure

of the device to the absolute maximum ratings for an ex-

tended period may degrade the device and effect its reli-

ability.

Absolute Maximum Ratings

Applications

Parameter

Min

Max

Units

V

—

350

V

Total Package Dissipation

—

2.5

W

Operational Temperature

-40

+85

Storage Temperature

-40

+125

Soldering Temperature

—

+220