CS5101A-AP8 datasheet(3/40 Pages) CIRRUS

3 / 40 page

CS5101A

Notes:

6. Applies only in the track mode. When converting or calibrating, input capacitance will not exceed 30 pF.

7. Conversion time scales directly to the master clock speed. The times shown are for synchronous,

internal loopback (FRN mode) with 8.0 MHz CLKIN. In PDT, RBT, and SSC modes, asynchronous delay

between the falling edge of HOLD and the start of conversion may add to the apparent conversion time.

This delay will not exceed 1.5 master clock cycles + 10 ns. In PDT, RBT, and SSC modes, CLKIN can

be increased as long as the HOLD sample rate is 100 kHz max.

8. The CS5101A requires 6 clock cycles of coarse charge, followed by a minimum of 1.125

µs of fine charge.

FRN mode allows 9 clock cycles for fine charge which provides for the minimum 1.125

µs with an 8 MHz

clock, however; in PDT, RBT, or SSC modes, at clock frequencies of 8 MHz or less, fine charge may

be less than 9 clock cycles. This reflects the typ. specification (6 clock cycles + 1.125

µs).

9. Throughput is the sum of the acquisition and conversion times. It will vary in accordance with conditions

affecting acquisition and conversion times, as described above.

10. All outputs unloaded. All inputs at VD+ or DGND.

11. Power consumption in the sleep mode applies with no master clock applied (CLKIN held high or low).

12. With 300 mV p-p, 1 kHz ripple applied to each supply separately in the bipolar mode. Rejection

improves by 6 dB in the unipolar mode to 90 dB. Figure 23 shows a plot of typical power supply

rejection versus frequency.

ANALOG CHARACTERISTICS (continued)

CS5101A -J,K

CS5101A -A,B

Parameter*

Symbol Min Typ Max Min Typ Max

Units

Specified Temperature Range

0 to +70

40 to +85

°C

Analog Input

Aperture Time

Aperture Jitter

100

Input Capacitance

(Note 6)

Unipolar Mode

Bipolar Mode

320

200

425

265

320

200

425

265

Conversion & Throughput

Conversion Time

(Note 7)

-8

-16

8.12

16.25

8.12

16.25

µs

Acquisition Time

(Note 8)

-8

-16

2.6

1.88

3.75

2.6

1.88

3.75

µs

Throughput

(Note 9)

-8

-16

ftp

100

kHz

Power Supplies

Power Supply Current

(Note 10)

Positive Analog

Negative Analog

(SLEEP High)

Positive Digital

Negative Digital

IA+

IA-

ID+

ID-

-21

-11

-28

-15

-21

-11

-28

-15

Power Consumption

(Notes 10, 11)

(SLEEP High)

(SLEEP Low)

Pdo

Pds

320

430

320

430

Power Supply Rejection:

(Note 12)

Positive Supplies

Negative Supplies

PSR

DS45F2

CS5101A-AP8 bảng dữ liệu(PDF) 3 Page - Cirrus Logic

CS5101A-AP8 bảng dữ liệu(HTML) 3 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

bảng dữ liệu tải về

Link URL