L6208PD datasheet(18/35 Pages) STMICROELECTRONICS

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Decay modes

L6208

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DocID7514 Rev 2

Decay modes

The CONTROL input is used to select the behavior of the bridge during the off time. When

the CONTROL pin is low, the fast decay mode is selected and both transistors in the bridge

are switched off during the off time. When the CONTROL pin is high, the slow decay mode

is selected and only the low-side transistor of the bridge is switched off during the off time.

Figure 16 shows the operation of the bridge in the fast decay mode. At the start of the off

time, both of the power MOS are switched off and the current recirculates through the two

opposite freewheeling diodes. The current decays with a high di/dt since the voltage across

the coil is essentially the power supply voltage. After the deadtime, the lower power MOS in

parallel with the conducting diode is turned on in synchronous rectification mode. In

applications where the motor current is low it is possible that the current can decay

completely to zero during the off time. At this point if both of the power MOS were operating

in the synchronous rectification mode, it would then be possible for the current to build in the

opposite direction. To prevent this only the lower power MOS is operated in synchronous

rectification mode. This operation is called “Quasi-synchronous rectification mode”. When

the monostable times out, the power MOS are turned on again after some delay set by the

deadtime to prevent cross conduction.

Figure 17 shows the operation of the bridge in the slow decay mode. At the start of the off

time, the lower power MOS is switched off and the current recirculates around the upper half

of the bridge. Since the voltage across the coil is low, the current decays slowly. After the

deadtime the upper power MOS is operated in the synchronous rectification mode. When

the monostable times out, the lower power MOS is turned on again after some delay set by

the deadtime to prevent cross conduction.

Figure 16. Fast decay mode output stage configurations

Figure 17. Slow decay mode output stage configurations

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