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CS5165H bảng dữ liệu(PDF) 14 Page - Cherry Semiconductor Corporation

tên linh kiện CS5165H
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14
“Droop” Resistor for Adaptive Voltage Positioning
Adaptive voltage positioning is used to help keep the out-
put voltage within specification during load transients. To
implement adaptive voltage positioning a “Droop
Resistor” must be connected between the output inductor
and output capacitors and load. This resistor carries the full
load current and should be chosen so that both DC and AC
tolerance limits are met. An embedded PC trace resistor
has the distinct advantage of near zero cost implementa-
tion. However, this droop resistor can vary due to three
reasons: 1) the sheet resistivity variation causes the thick-
ness of the PCB layer to vary. 2) the mismatch of L/W, and
3) temperature variation.
1) Sheet Resistivity
for one ounce copper, the thickness variation is
typically 1.15 mil to 1.35 mil. Therefore the error due to
sheet resistivity is:
= 16%
2) Mismatch due to L/W
The variation in L/W is governed by variations due to
the PCB manufacturing process that affect the
geometry and the power dissipation capability of the
droop resistor. The error due to L/W mismatch is
typically 1%
3) Thermal Considerations
Due to I2 × R power losses the surface temperature of
the droop resistor will increase causing the resistance
to increase. Also, the ambient temperature variation
will contribute to the increase of the resistance,
according to the formula:
R = R20 [1+ α20(Τ−20)]
where:
R20 = resistance at 20˚C
α =
T= operating temperature
R = desired droop resistor value
For temperature T = 50˚C,
the % R change = 12%
Droop Resistor Tolerance
Tolerance due to sheet resistivity variation
16%
Tolerance due to L/W error
1%
Tolerance due to temperature variation
12%
Total tolerance for droop resistor
29%
In order to determine the droop resistor value the nominal
voltage drop across it at full load has to be calculated. This
voltage drop has to be such that the output voltage full
load is above the minimum DC tolerance spec.
VDROOP(TYP) =
Example: for a 300MHz Pentium®II, the DC accuracy spec
is 2.74 < VCC(CORE) < 2.9V, and the AC accuracy spec is
2.67V < VCC(CORE) <2.93V. The CS5165H DAC output volt-
age is +2.812V < VDAC < +2.868V. In order not to exceed
the DC accuracy spec, the voltage drop developed across
the resistor must be calculated as follows:
VDROOP(TYP)=
=
= 56mV
With the CS5165H DAC accuracy being 1%, the internal
error amplifier’s reference voltage is trimmed so that the
output voltage will be 40mV high at no load. With no load,
there is no DC drop across the resistor, producing an out-
put voltage tracking the error amplifier output voltage,
including the offset. When the full load current is deliv-
ered, a drop of -56mV is developed across the resistor.
Therefore, the regulator output is pre-positioned at 40mV
above the nominal output voltage before a load turn-on.
The total voltage drop due to a load step is ∆V-40mV and
the deviation from the nominal output voltage is 40mV
smaller than it would be if there was no droop resistor.
Similarly at full load the regulator output is pre-positioned
at 16mV below the nominal voltage before a load turn-off.
the total voltage increase due to a load turn-off is ∆V-16mV
and the deviation from the nominal output voltage is 16mV
smaller than it would be if there was no droop resistor.
This is because the output capacitors are pre-charged to
value that is either 40mV above the nominal output voltage
before a load turn-on or, 16mV below the nominal output
voltage before a load turn-off (see figure 7).
Obviously, the larger the voltage drop across the droop
resistor ( the larger the resistance), the worse the DC and
load regulation, but the better the AC transient response.
Design Rules for Using a Droop Resistor
The basic equation for laying an embedded resistor is:
RAR = ρ ×
or R = ρ ×
where:
L
(W × t)
L
A
2.812V-2.74V
1.3
[VDAC(MIN)-VDC PENTIUM®II(MIN)]
1+RDROOP(TOLERANCE)
[VDAC(MIN)-VDC(MIN)]
1+RDROOP(TOLERANCE)
0.00393
˚C
1.35 - 1.15
1.25
Application Information: continued



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