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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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THS4501CD bảng dữ liệu(PDF) 12 Page - National Semiconductor (TI) |
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THS4501CD bảng dữ liệu(HTML) 12 Page - National Semiconductor (TI) |
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12 / 48 page  −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 HD2 HD3 VO − Output Voltage Swing − V Single-Ended Input to Differential Output Gain = 2 RL = 800 Ω Rf = 1 kΩ f= 30 MHz VS = ±5 V −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 HD2 HD3 VO − Output Voltage Swing − V Differentia Input to Differential Output Gain = 2 RL = 800 Ω Rf = 1 kΩ f= 8 MHz VS = ±5 V −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 0 400 800 1200 1600 HD2 HD3 RL − Load Resistance − Ω Single-Ended Input to Differential Output Gain = 1 VO = 2 VPP Rf = 392 Ω f= 30 MHz VS = ±5 V 30 35 40 45 50 55 0 20 40 60 80 100 120 f Frequency MHz - - Gain = 1 RF = 392 W VO = 2 VPP VS = ± 5 V −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 0 400 800 1200 1600 HD2 HD3 RL − Load Resistance − Ω Differential Input to Differential Output Gain = 1 VO = 2 VPP Rf = 392 Ω f= 30 MHz VS = ±5 V −100 −90 −80 −70 −60 −50 10 100 f − Frequency − MHz Single-Ended Input to Differential Output Gain = 1 RL = 800 Ω Rf = 392 Ω VO = 2 VPP VS = ±5 V -1.5 -1.0 -0.5 0 0.5 1.0 1.5 0 2 4 6 8 10 12 14 t Time ns - - Gain = 1 RL = 800 W RF = 499 W f= 1MHz VS = ±5 V Rising Edge Falling Edge 0 5 10 15 20 t − Time − ns Gain = 1 RL = 800 Ω Rf = 499 Ω f= 1 MHz VS = ±5 V Rising Edge Falling Edge −0.8 −0.6 −0.4 −0.2 0 0.2 0.4 0.6 0.8 0 500 1000 1500 2000 2500 3000 VO − Differential Output Voltage Step − V Gain = 1 RL = 800 Ω Rf = 392 Ω VS = ±5 V 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 THS4500 THS4501 SLOS350F – APRIL 2002 – REVISED OCTOBER 2011 www.ti.com TYPICAL CHARACTERISTICS: ±5 V (continued) HARMONIC DISTORTION HARMONIC DISTORTION HARMONIC DISTORTION vs vs vs OUTPUT VOLTAGE SWING OUTPUT VOLTAGE SWING LOAD RESISTANCE Figure 19. Figure 20. Figure 21. THIRD-ORDER INTERMODULATION THIRD-ORDER OUTPUT INTERCEPT HARMONIC DISTORTION DISTORTION POINT vs vs vs LOAD RESISTANCE FREQUENCY FREQUENCY Figure 22. Figure 23. Figure 24. SLEW RATE vs DIFFERENTIAL OUTPUT VOLTAGE STEP SETTLING TIME SETTLING TIME Figure 25. Figure 26. Figure 27. 12 Submit Documentation Feedback Copyright © 2002–2011, Texas Instruments Incorporated Product Folder Link(s): THS4500 THS4501 |
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