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THS4532IPW bảng dữ liệu(PDF) 16 Page - National Semiconductor (TI)

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tên linh kiện THS4532IPW
Giải thích chi tiết về linh kiện  Ultra Low Power, Rail-to-Rail Output, Fully-Differential Amplifier
PDF  44 Pages
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THS4532IPW bảng dữ liệu(HTML) 16 Page - National Semiconductor (TI)

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Input Offset Voltage Temperature Drift (µV/°C)
0°C to +70°C
−40°C to +85°C
−40C to +125C
THS4532IPW
VS = 2.7 V
Both Channels
G033
−1000
−800
−600
−400
−200
0
200
400
600
800
1000
−50
−25
0
25
50
75
100
125
Temperature (°C)
THS4532IPW
VS = 2.7 V
Channel 1
G034
0
100
200
300
400
500
600
700
Input Offset Voltage (µV)
Ch 1
Ch 2
THS4532IPW
VS = 2.7 V
TA = 25°C
G032
−50
−40
−30
−20
−10
0
10
20
30
40
50
−50
−25
0
25
50
75
100
125
Temperature (°C)
THS4532IPW
VS = 2.7 V
Channel 1
G031
THS4532
SLOS829 – FEBRUARY 2013
www.ti.com
TYPICAL CHARACTERISTICS: VS = 2.7V (continued)
Test conditions unless otherwise noted: VS+ = 2.7 V, VS– = 0V, CM = open, VOUT = 2Vpp, RF = 2kΩ, RL = 2kΩ Differential, G =
1V/V, Single-Ended Input, Differential Output, Input and Output Referenced to mid-supply unless otherwise noted.
INPUT OFFSET CURRENT
vs
INPUT OFFSET VOLTAGE
TEMPERATURE
HISTOGRAM
Figure 32.
Figure 33.
INPUT OFFSET VOLTAGE
vs
INPUT OFFSET VOLTAGE TEMP DRIFT
HISTOGRAM
TEMPERATURE
Figure 34.
Figure 35.
16
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Product Folder Links :THS4532



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