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ACPL-C87AT bảng dữ liệu(PDF) 7 Page - AVAGO TECHNOLOGIES LIMITED |
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ACPL-C87AT bảng dữ liệu(HTML) 7 Page - AVAGO TECHNOLOGIES LIMITED |
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7 / 14 page ![]() 7 Electrical Specifications (continued) Unless otherwise noted, all typical values at TA = 25 °C, VDD1 = VDD2 = 5 V, VIN = 0 to 2 V, VSD = 0 V; all Minimum/Maximum specifications are at recommended voltage supply conditions: 4.5V < VDD1 < 5.5V, 4.5V < VDD2 < 5.5V Parameter Symbol Min. Typ. Max. Unit Test Conditions Fig. Note AC CHARACTERISTICS Small-Signal Bandwidth (-3 dB) f–3 dB 100 kHz VOUT Noise NOUT 1.3 mVRMS VIN = 2 V; BW = 1 kHz 23 5 Input to Output Propagation Delay (10%-10%) tPD10 2.2 3.5 ms VIN = 0 to 2 V Step 21, 26 Input to Output Propagation Delay (50%-50%) tPD50 3.7 6.0 ms VIN = 0 to 2 V Step 21, 26 Input to Output Propagation Delay (90%-90%) tPD90 5.3 7.0 ms VIN = 0 to 2 V Step 21, 26 Output Rise / Fall Time (10%-90%) tR/F 2.7 4.0 ms Step Input Shutdown Time tSD 25 ms 25 Shutdown Recovery Time tON 150 ms 25 Power Supply Rejection PSR -78 dB 1 Vp-p, 1 kHz sine wave ripple on VDD1, differential output Common Mode Transient Immunity CMTI 10 15 kV/ ms VCM = 1 kV, TA = 25 °C 24 2 Package Characteristics Unless otherwise noted, all typical values are at TA = 25 °C; all Minimum/Maximum specifications are at Recommended Operating Conditions. Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note Input-Output Momentary Withstand Voltage * VISO 5000 VRMS RH < 50%, t = 1 min., TA = 25 °C 3, 4 Input-Output Resistance RI-O 1014 W VI-O = 500 VDC 3 Input-Output Capacitance CI-O 0.5 pF f =1 MHz 3 * The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. Notes: 1. Gain is defined as the slope of the best-fit line of differential output voltage (VOUT+ - VOUT-) versus input voltage over the nominal range, with offset error adjusted. 0.5% Gain tolerance for ACPL-C87BT and 1% tolerance for ACPL-C87AT. 2. Common mode transient immunity (CMTI) is tested by applying a fast rising/falling voltage pulse across GND1 (pin 4) and GND2 (pin 5). The output glitch observed is less than 0.2 V from the average output voltage for less than 1 ms. 3. Device considered a two terminal device: pins 1, 2, 3 and 4 shorted together, and pins 5, 6, 7 and 8 shorted together. 4. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 6000 VRMS for 1 second. 5. Noise is measured at the output of the differential to single ended post amplifier. |
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