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CAT28C17API-20T bảng dữ liệu(PDF) 8 Page - Catalyst Semiconductor

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CAT28C17API-20T bảng dữ liệu(HTML) 8 Page - Catalyst Semiconductor

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CAT28C17A
8
Doc. No. 25034-00 2/98
HARDWARE DATA PROTECTION
The following is a list of hardware data protection fea-
tures that are incorporated into the CAT28C17A.
(1) VCC sense provides for write protection when VCC
falls below 3.0V min.
(2) A power on delay mechanism, tINIT (see AC charac-
teristics), provides a 5 to 20 ms delay before a write
sequence, after VCC has reached 3.0V min.
(3) Write inhibit is activated by holding any one of OE
low, CE high or WE high.
(4) Noise pulses of less than 20 ns on the WE or CE
inputs will not result in a write cycle.
ORDERING INFORMATION
Notes:
(1)
The device used in the above example is a CAT28C17ANI-20T (PLCC, Industrial temperature, 200 ns Access Time, Tape & Reel).
28C17A F09
Prefix
Device #
Suffix
28C17A
N
I
T
Product
Number
Tape & Reel
T: 500/Reel
Package
P: PDIP
N: PLCC
J: SOIC (JEDEC)
K: SOIC (EIAJ)
-20
CAT
Optional
Company ID
Temperature Range
Blank = Commercial (0˚C to +70˚C)
I = Industrial (-40˚C to +85˚C)
A = Automotive (-40˚ to +105˚C)*
Speed
20: 200ns
* -40˚C to +125˚C is available upon request



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