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TSL2572 bảng dữ liệu(PDF) 13 Page - ams AG

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TSL2572 bảng dữ liệu(HTML) 13 Page - ams AG

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TSL2572
LIGHT-TO-DIGITAL CONVERTER
TAOS132 − MARCH 2012
12
r
r
Copyright
E 2012, TAOS Inc.
The LUMENOLOGY
r Company
www.taosinc.com
Register Set
The device is controlled and monitored by data registers and a command register accessed through the serial
interface. These registers provide for a variety of control functions and can be read to determine results of the
ADC conversions. The register set is summarized in Table 1.
Table 1. Register Address
ADDRESS
RESISTER NAME
R/W
REGISTER FUNCTION
RESET VALUE
−−
COMMAND
W
Specifies register address
0x00
0x00
ENABLE
R/W
Enables states and interrupts
0x00
0x01
ATIME
R/W
ALS time
0xFF
0x03
WTIME
R/W
Wait time
0xFF
0x04
AILTL
R/W
ALS interrupt low threshold low byte
0x00
0x05
AILTH
R/W
ALS interrupt low threshold high byte
0x00
0x06
AIHTL
R/W
ALS interrupt high threshold low byte
0x00
0x07
AIHTH
R/W
ALS interrupt high threshold high byte
0x00
0x0C
PERS
R/W
Interrupt persistence filters
0x00
0x0D
CONFIG
R/W
Configuration
0x00
0x0F
CONTROL
R/W
Control register
0x00
0x12
ID
R
Device ID
ID
0x13
STATUS
R
Device status
0x00
0x14
C0DATA
R
CH0 ADC low data register
0x00
0x15
C0DATAH
R
CH0 ADC high data register
0x00
0x16
C1DATA
R
CH1 ADC low data register
0x00
0x17
C1DATAH
R
CH1 ADC high data register
0x00
The mechanics of accessing a specific register depends on the specific protocol used. See the section on I2C
protocols on the previous pages. In general, the COMMAND register is written first to specify the specific
control/status register for following read/write operations.



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