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TSL201CL bảng dữ liệu(PDF) 5 Page - ams AG |
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TSL201CL bảng dữ liệu(HTML) 5 Page - ams AG |
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5 / 15 page ![]() TSL201CL 64 y 1 LINEAR SENSOR ARRAY TAOS146 − APRIL 2012 4 r r Copyright E 2012, TAOS Inc. The LUMENOLOGY r Company www.taosinc.com Electrical Characteristics at fclock = 1 MHz, VDD = 5 V, TA = 25°C, λp = 640 nm, tint = 5 ms, RL = 330 Ω, Ee = 16.5 μW/cm2 (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Vout Analog output voltage (white, average over 64 pixels) see Note 1 1.6 2 2.4 V Vdrk Analog output voltage (dark, average over 64 pixels) Ee = 0 0 50 120 mV PRNU Pixel response nonuniformity See Notes 2 & 3 ±4% ± 7.5% Nonlinearity of analog output voltage See Note 3 ±0.4% FS Output noise voltage See Note 4 1 mVrms Re Responsivity (See Note 5) 18 23 V/ (μJ/cm2) SE Saturation exposure See Note 6 142 nJ/cm2 Vsat Analog output saturation voltage 2.5 3.4 V DSNU Dark signal nonuniformity All pixels, Ee = 0 See Note 7 25 120 mV IL Image lag See Note 8 0.5% IDD Supply current, output idle 3.4 5 mA IIH High-level input current VI = VDD 1 μA IIL Low-level input current VI = 0 1 μA Ci(SI) Input capacitance, SI 5 pF Ci(CLK) Input capacitance, CLK 5 pF NOTES: 1. The array is uniformly illuminated with a diffused LED source having a peak wavelength of 640 nm. 2. PRNU is the maximum difference between the voltage from any single pixel and the average output voltage from all pixels of the device under test when the array is uniformly illuminated at the white irradiance level. PRNU includes DSNU. 3. Nonlinearity is defined as the maximum deviation from a best-fit straight line over the dark-to-white irradiance levels, as a percent of analog output voltage (white). 4. RMS noise is the standard deviation of a single-pixel output under constant illumination as observed over a 5-second period. 5. Re(min) = [Vout(min) − Vdrk(max)] ÷ (E e × t int) 6. Minimum saturation exposure is calculated using the minimum Vsat, the maximum Vdrk, and the maximum Re. 7. DSNU is the difference between the maximum and minimum output voltage in the absence of illumination. 8. Image lag is a residual signal left in a pixel from a previous exposure. It is defined as a percent of white-level signal remaining after a pixel is exposed to a white condition followed by a dark condition: IL + V out (IL) * V drk V out (white) * V drk 100 Timing Requirements (see Figure 1 and Figure 2) MIN NOM MAX UNIT tsu(SI) Setup time, serial input (see Note 9) 20 ns th(SI) Hold time, serial input (see Note 9 and Note 10) 0 ns tw Pulse duration, clock high or low 50 ns tr, tf Input transition (rise and fall) time 0 500 ns NOTES: 9. Input pulses have the following characteristics: tr = 6 ns, tf = 6 ns. 10. SI must go low before the rising edge of the next clock pulse. Dynamic Characteristics over recommended ranges of supply voltage and operating free-air temperature (see Figure 2) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ts Analog output settling time to ±1% RL = 330 Ω, CL = 10 pF 185 ns |
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