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TMD2772 bảng dữ liệu(PDF) 24 Page - ams AG

tên linh kiện TMD2772
Giải thích chi tiết về linh kiện  DIGITAL ALS and PROXIMITY MODULE
PDF  35 Pages
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TMD2772 bảng dữ liệu(HTML) 24 Page - ams AG

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TMD2772
DIGITAL ALS
and PROXIMITY MODULE
TAOS147
E − DECEMBER 2012
23
The LUMENOLOGY
r Company
r
r
Copyright
E 2012, TAOS Inc.
www.taosinc.com
Configuration Register (0x0D)
The configuration register sets the proximity LED drive level, wait long time, and ALS gain level.
Table 12.
Configuration Register
6
75
4
2
31
0
CONFIG
Reserved
WLONG
Reset
0x00
PDL
AGL
FIELD
BITS
DESCRIPTION
Reserved
7:3
Reserved. Write as 0.
AGL
2
ALS gain level. When asserted, the 1
× and 8× ALS gain (AGAIN) modes are scaled by 0.16. Otherwise,
AGAIN is scaled by 1. Do not use with AGAIN greater than 8
×.
WLONG
1
Wait Long. When asserted, the wait cycles are increased by a factor 12
× from that programmed in the
WTIME register.
PDL
0
Proximity drive level. When asserted, the proximity LDR drive current is reduced by 9.
Proximity Pulse Count Register (0x0E)
The proximity pulse count register sets the number of proximity pulses that the LDR pin will generate during the
Prox Accum state. The pulses are generated at a 62.5-kHz rate.
Table 13.
Proximity Pulse Count Register
6
75
4
2
31
0
PPULSE
PPULSE
Reset
0x00
FIELD
BITS
DESCRIPTION
PPULSE
7:0
Proximity Pulse Count. Specifies the number of proximity pulses to be generated.



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