MM145453VSLASHNOPB datasheet(2/10 Pages) TI

2 / 10 page

MM145453

SNLS061C – MAY 2000 – REVISED MARCH 2013

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1) (2)

Voltage at Any Pin, Referenced to Gnd

-0.3V to +10V

Storage Temperature

-65°C to +150°C

Power Dissipation at 25°C

350mW

Power Dissipation at 70°C

300mW

Junction Temperature

+150°C

Lead Temperature

(Soldering, 10s)

300°C

(1)

“Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to

imply that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device

operation.

(2)

If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.

Recommended Operating Conditions

VDD

3V to 10V

Operating Temperature

−40°C to 85°C

Electrical Characteristics

The following specifications apply for TA within operation range, VDD = 3.0V to 10V, VSS = 0V, unless otherwise specified.

Parameter

Conditions

Min

Typical

Max

Units

Supply Voltage, VDD

Average Supply Current, IDD

All Outputs Open, Clock=Gnd,

Data=Gnd,OSC=Gnd, BP_IN @ 32Hz

VDD= 5V

µA

VDD= 10V

µA

Input Logical '0' Voltage, VIL

VDD= 3V

0.4

VDD= 5V

0.8

VDD= 10V

0.8

Input Logical '1' Voltage, VIH

VDD= 3V

2.0

VDD= 5V

2.0

VDD= 10V

8.0

Segment Sink Current, IOL

VDD= 3V, VOUT= 0.3V

-20

-40

µA

Segment Source Current, IOH

VDD= 3V, VOUT= 2.7V

µA

Backplane Out Sink Current, IOL

VDD= 3V, VOUT= 0.3V

-320

-500

µA

Backplane Out Source Current,

VDD= 3V, VOUT= 2.7V

320

500

µA

IOH

Segment Output Offset Voltage

Segment Load = 250pF (1)

+/-50

Backplane Output Offset Voltage

Backplane Load = 8750pF (1)

+/-50

Backplane Out Frequency

ROSC_IN= 50kΩ, COSC_IN= 0.01µF

Clock Input Frequency, fCLOCK

(2)

VDD= 3V

(1) (3)

500

kHz

VDD= 5V

(1)

750

kHz

VDD= 10V

(1)

1.0

MHz

Clock Input Duty Cycle(2)

Data Input Set-Up Time, tDS

300

Data Input Hold Time, tDH

300

(1)

This parameter is guaranteed (but not production tested) over the operating temperature range and the operating supply voltage range.

Not to be used in Q.A. testing.

(2)

Clock input rise time (tr) and fall time (tf) must not exceed 300ns

(3)

AC input waveform for test purposes: tr≤ 20ns, tf≤ 20ns, fCLOCK= 500kHz, Duty Cycle = 50% ±10%

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