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AS3543 bảng dữ liệu(PDF) 77 Page - ams AG |
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AS3543 bảng dữ liệu(HTML) 77 Page - ams AG |
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77 / 92 page ![]() www.austriamicrosystems.com Revision 1.11 76 - 91 AS3543 3v2 Data Sheet - R e g i s t e r D e f i n i t i o n Table 78. PMU_Enable Register Name Base Default PMU_Enable 2-wire serial 00h Offset: 1Ch-2 PMU_Enable Register Selects the extended register on address 17h to 1Bh and enables writng to these PMU register. It also sets the ADC10 multiplexer to measure various regulator voltages This register is reset at a AVDD27-POR. Bit Bit Name Default Access Bit Description 7:4 DC_TEST_MUX <3:0> 0000 R/W Allows multiplexing internal and external supply voltages to one DC test node which can be further multiplexed to the ADC10. The accuracy is 5mV/LSB (see reg. 2Eh) 0x0: open 0x1: AVDD27 0x2: AVDD17 0x3: PVDD1 0x4: PVDD2 0x5: CVDD1 0x6: CVDD2 0x7: RVDD 0x8: FVDD 0x9: PWGD 0xA-0xF: n/a 3 PMU_GATE 000 R/W Enables all settings made in registers 17h to 1Bh at once. If this bit is set, changes are activated as soon as they are written to the related register. 0: no change 1: change at once 2:0 PMU_WR_ENABLE <2:0> 000 R/W Selects extended registers 17h to 1Bh for the next write 0: no register selected 1: 17h-1 to 1Bh-1 selected 2: 17h-2 to 1Bh-2 selected ... 7: 17h-7 to 1Bh-7 selected |
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