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USB2412 bảng dữ liệu(PDF) 14 Page - SMSC Corporation |
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USB2412 bảng dữ liệu(HTML) 14 Page - SMSC Corporation |
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14 / 27 page ![]() 2-Port USB 2.0 Hi-Speed Hub Controller Datasheet Revision 1.3 (12-27-11) 14 SMSC USB2412 DATASHEET Chapter 3 Internal Default Configuration SMSC’s USB 2.0 hub is fully compliant with the USB Specification1.. Refer to Chapter 10 (Hub Specification) for general details regarding hub operation and functionality. The hub provides one Transaction Translator (TT) that is shared by both downstream ports (defined as Single-TT configuration). The TT contains 4 non-periodic buffers. 3.1 Hub Configuration The USB2412 only supports internal defaults with the exception of the non-removable strap option (using NON_REM[1:0]). The hub internal default settings are as follows: Internal Default Configuration without over-rides Strap options enabled Self-powered operation enabled Individual power switching Individual over-current sensing 3.2 Reset There are two different resets that the hub experiences. One is a hardware reset via RESET_N and the second is a USB Bus Reset. 3.2.1 External Hardware RESET_N A valid hardware reset is defined as assertion of RESET_N for a minimum of 1 μs after all power supplies are within operating range. While reset is asserted, the hub (and its associated external circuitry) consumes less than 500 μA of current from the upstream USB power source. Assertion of RESET_N causes the following: 1. All downstream ports are disabled, and PRTPWR power to downstream devices is removed. 2. The PHYs are disabled, and the differential pairs will be in a high-impedance state. 3. All transactions immediately terminate; no states are saved. 4. All internal registers return to the default state (in most cases, 00h). 5. The external crystal oscillator is halted. 6. The PLL is halted. 7. The hub is “operational” 500 μs after RESET_N is negated. |
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