AS1374

Datasheet - Application In form atio n

www.austriamicrosystems.com/LDOs/AS1374

Revision 1.8

11 - 18

9.3 Power Dissipation

Maximum power dissipation (PD) of the LDO is the sum of the power dissipated by the internal series MOSFET and the quiescent current

required to bias the internal voltage reference and the internal error amplifier, and is calculated as:

Watts

(EQ 3)

Internal power dissipation as a result of the bias current for the internal voltage reference and the error amplifier is calculated as:

Watts

(EQ 4)

Total LDO power dissipation is calculated as:

Watts

(EQ 5)

9.4 Junction Temperature

Under all operating conditions, the maximum junction temperature should not be allowed to exceed 125°C (unless otherwise specified in the

datasheet). Limiting the maximum junction temperature requires knowledge of the heat path from junction to case (

manufacturer), and adjustment of the case to ambient heat path (

Figure 27. Package Physical Arrangements

PD

MAX



I

LOAD MAX



=

V

IN MAX



V

OUT MIN



–



PD

MAX



V

IN MAX

=

PD

MAX



PD

MAX

 PD

MAX



+

Bias



=

Chip

PCB

Package

Transfer Layer

CS-WLP Package

Solder Balls