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AS1123

Datasheet - A p p l i c a t i o n I n f o r m a t i o n

The last pattern written into the shift register will be saved before starting low-current diagnosis mode and can be displayed immediately after the

test has been performed.

Low-current diagnostic mode is started with 3 clock pulses during error detection mode. Then OEN should be enabled for

≥2 s for testing. With

the rising edge of OEN the LED test is stopped, and while LD is high the desired error mode can be selected with the corresponding clock

pulses. After LD and OEN go low again the previously saved pattern can be displayed at the outputs.

With the next data input the detailed error code will be clocked out at pin SDO.

Note:

See Figure 21 for use of an external test pattern.

Figure 21. Low-Current Diagnosis Mode with External Test Pattern – 64 Cascaded AS1123s

Cascading Devices

To cascade multiple AS1123 devices, pin SDO must be connected to pin SDI of the next AS1123 (see Figure 22). At each rising edge of CLK the

LSB of the shift register will be written into the shift register SDI of the next AS1123 in the chain.

Note:

When n*AS1123 devices are in one chain, n*16 clock pulses are needed to latch-in the input data.

Figure 22. Cascading AS1123 Devices

Temperature Error Code

Data2

Data1

GEF

GEF

T/O or S Error Code

Data0

Rising Edge of OEN

Acquisition of Error Status

Display

SDI

SDO

CLK

OEN

LD

1024x

1024x

3x Clocks

Low-Current

Mode

Clock for Error

Mode 1x/2x

Falling Edge LD; Error Regis-

ter is copied into Shift Register

O or S Error Code

from Test Pattern

1024x

GEF = Global Error Flag

Low-Current Diagnosis Mode

≤ 40mA

≤ 40mA

Current

≤ 0.8mA

Data2

Data3

External all 1s Test Pattern

AS1123 #n-1

SDI

SDO

CLK

LD

OEN

SDI

CLK

LD

OEN

AS1123 #1

SDI

SDO

CLK

LD

OEN

AS1123 #2

SDI

SDO

CLK

LD

OEN